Workshop on Advanced Low Power Systems

This is a workshop offered by ALPS from Japan, it will be held in conjunction with the 21st International Conference on Supercomputing. The conference which took place in Australia last year will be held in
Seattle, Washington on June 17, 2007. The topics that will be covered include:

     Microarchitecture design
     Logic and digital circuit design
     Embedded system design
     Power-aware HPC architecture
     Power-aware compiler and operating system design
     Power-aware middleware
     Power-aware run-time systems
     Circuit/architecture/OS cooperation
     Power-aware applications and algorithms
     Tools for power-aware hardware-software design and analysis
     Power-aware fault tolerant systems
     Thermal management

I got a chance to read through some of the papers that were covered at the 2006 workshop, and they certainly hit some of the big topics in low power design. For example, topics such as Dynamic Voltage and Frequency Scaling or On-Chip Memory Access Optimization were presented. However, the papers that I found most interesting were, a paper on Reducing Energy in Instruction Caches by Using Multiple Line Buffers with Prediction, and Power and Performance Advantages of Highly Clustered Microarchitectures. Judging from this year’s topic list and the interesting papers from the previous workshop, I’m sure that this event is worth attending. To bad I don’t live in Seattle.

International Conference on Supercomputing

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